SILEXICA AT XDF 2019   Optimization of Aerospace/Defense Algorithm for HLS with SLX FPGA

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SLX FPGA

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How to Find FPGA Hotspots
Apr 14, 2021 4:04
Learn about how to identify FPGA hotpots within your application with fast and accurate high-level latency estimates using SLX FPGA. Read more about SLX FPGA on https://www.silexica.com/products/slx-fpga/
Maximize C/C++ Kernel Performance in Alveo Accelerator Cards Using SLX FPGA at Xilinx Adapt 2021
Mar 31, 2021 5:19 min
Stephane Gauthier, SLX FPGA Product Manager, presented how "SLX FPGA can maximize your C/C++ kernel running on an Alveo Accelerator Card" during Xilinx Adapt: Data Center (March 24-25, 2021).
ISFPGA 2021 - “Enhancing and Simplyfying HLS with Xilinx Vitis Open Source and Silexica Tools”
Mar 3, 2021 1:30:56 min
Silexica co-presenting with Xilinx at the 29th International Symposium on Field-Programmable Gate Arrays (ISFPGA) 2021, the premier conference for presentation of advances in FPGA technology. In close collaboration with Xilinx, Silexica designed the new SLX Plugin to extend the capabilities of Vitis HLS as part of Xilinx’s Open Source initiative. Watch our tutorial co-presented with Xilinx : “Enhancing and Simplifying HLS with Xilinx Vitis Open Source and Silexica Tools” from February, Sunday 28th 2021 from 08:00 AM to 10 AM PST (UTC -8).
How to optimize an OpenCL Kernel for the data center using SLX FPGA - Jordon Inkeles
Nov 20, 2020 5:13 min
Learn more about how to optimize an OpenCL Kernel for the data center using SLX FPGA presented by Jordon Inkeles, VP of Product at Silexica, at the Global STAC Conference 2020. SLX FPGA accelerates a Fintech design example, leveraging Xilinx’s Vitis Platform’s bottom-up flow, Alveo U200 accelerator card, and the Vitis quantitative finance library.
Accelerate HLS Design Space Exploration with SLX FPGA - Stephane Gauthier - FPGA Conference Europe
Nov 16, 2020 31:32 min
Have you struggled with HLS designs? Is getting the best performance for the fewest possible FPGA resources important? Is understanding resource/performance trade-offs relevant? If so, watch “Accelerate HLS Design Space Exploration with SLX FPGA” presented by Silexica’s SLX FPGA Product Manager, Stephane Gauthier, at FPGA Conference Europe 2020.
Democratizing Accelerated Computing from Maximilian Odendahl at FPGA Conference Europe 2020
Sep 30, 2020 28:48 min
Maximilian Odendahl, CEO and co-founder of Silexica, presented the keynote “Democratizing Accelerated Computing” at FPGA Conference Europe 2020. Learn more about his vision to disrupt the developer’s journey from software to application-specific hardware systems, democratizing accelerated computing to help build a smart, connected and safe world.
SLX FPGA - Accelerate the Journey from C C++ to FPGA - Silexica Chalk talk on EE Journal
May 25, 2020 26:40 min
In this episode of Chalk Talk, Amelia Dalton chats with Jordon Inkeles of Silexica about using the SLX FPGA tool to truly harness the power of HLS with FPGAs, getting better results faster.
SLX FPGA Demo at XDF Europe 2019 - Optimization of Aerospace/Defense Algorithm for HLS with SLX FPGA
Jan 13, 2020 4:35 min
Juan Eusse, Senior Software Engineer, provides a demonstration of how SLX FPGA optimizes algorithms written in C/C++ for High-Level Synthesis.
SLX FPGA Demo at XDF 2019 - Optimizing Financial Algorithms for HLS with SLX FPGA
Oct 17, 2019 4:35 min
Benoit Pradelle, Principal Engineer / Product Owner, provides a demonstration of how SLX FPGA optimizes algorithms written in C/C++ for High-Level Synthesis.
SLX FPGA - Getting Software Through An HLS Flow - Silexica
May 4, 2020 7:35 min
Juan Eusse, Senior Software Engineer at Silexica, talks with Semiconductor Engineering about the evolution of high-level synthesis has evolved, where engineers typically go wrong in using HLS, and why it has become so popular for applications such as AI.
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