SLX 18.10 released with new FPGA and C/C++ features
October 23, 2018 – Silexica has released the latest version of the SLX multicore development tools with major improvements in the FPGA and C/C++ products. The industry-first SLX for FPGA tool has been further aligned with Xilinx’s SDSoC development environment to make HW/SW exploration prior to the High-Level Synthesis (HLS) phase quicker and more precise. SLX for C/C++ offers sub-object reporting and shared variable analysis for complete code understanding on the very latest platforms and further reduce the need for manual analysis of code to save on design time. More platforms models have been added to SLX Including the addition of the Renesas R-Car H3 and RISC-V enabling hardware/software optimization.
The headline new features in SLX 18.10 are:
Enhanced SLX for FPGA
SLX for FPGA analyzes C/C++ code to provide a deep understanding of software interdependencies, application hot spots, and parallelization opportunities to enable code optimization for heterogeneous multicore SoCs with FPGAs. The tool enables HW/SW exploration and recommends which part of your C/C++ code is best suited to stay on the ARM processor or to be accelerated in the FPGA fabric. In addition, SLX generates pragmas to accelerate your code on multicore ARM processors and FPGA fabric. Further enhancements include tighter integration with Xilinx’s SDSoC development environment.
Variable analysis for C/C++ System Simulation
SLX for C/C++ has new sub-object reporting capabilities to give precise insights into arrays and structures types. This allows users to optimize memory access patterns, usage and allocation of data buffers. In addition, new shared variable analysis reveals what variables are protected enabling for increased multi-threaded source code understanding. Previously developers had to manually to look into the synchronization of their code.
New system simulation capabilities give insights into software and hardware integration for multi-threaded POSIX applications. SLX generates and displays thread states, inter-thread synchronization, system-level Gantt charts and processor utilization. This gives the user clear and precise information to enable performance improvements.
Automotive static and dynamic analysis
SLX now combines static and dynamic dependency analysis to optimize scheduling of task-based C/C++ and AUTOSAR Classic applications. These dependencies can be tested during the scheduling design phase to validate the impact of a change and perform “what if” analyses without changing the application.
These are just some of the features improved in the range of SLX programming tools. If you would like a demonstration or for a free trial, visit silexica.com/try-now