The SLX Mapper receives a parallel application specification as input, in the form of a process network or data-flow application. Here, an application is represented as a collection of independent processes that communicate via logical, buffered FIFO channels. This formalism is a natural way to represent streaming and computer-intensive applications in a multitude of industries.

The SLX Mapper analyzes the computation and communication patterns of a process network and uses advanced optimization techniques and performance estimation to automatically select (i) the optimal mapping of processes to heterogeneous cores and accelerators, (ii) the fastest mapping of logical channels to platform interconnects and memories, and (iii) the most effective memory allocation for the buffers used for inter-process communication.

Additionally, the user can specify real-time and resource constraints, which are taken into account when computing a solution. Internally, the SLX Mapper uses an abstract model of the target multicore architecture as well as fast and accurate software performance estimation technologies. Optionally, measured or estimated power consumption information can be used in concert with the abovementioned performance estimate to enable power-optimized mapping. In addition to the complete spatial (“where”) and temporal (“when”) application mapping that can be forwarded to the SLX Generator, or to the customer’s in-house code generator backend, the SLX Mapper produces a wide range of advanced analyses that can be used for further optimization. The SLX Mapper comes with support for a wide range of existing platforms, covering multiple industries.